1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, it relates to a method of manufacturing a semiconductor device by which impurities, such as organic substances, included in a metal wiring material can be removed.
2. Description of the Related Art
With the recent rapid progress of finer patterning techniques, copper (Cu) wiring having a lower resistance has been used as a wiring material between transistors in the manufacture of semiconductor devices. However, copper presents difficulties in its film formation and line-shaped etching including rapid corrosion development, so that the Cu wiring is formed by using a damascene method. The damascene method comprises forming an interlayer insulating film on transistors and a lower metal wiring, forming via holes and a wiring trench, which are used for connections to the transistors and the lower metal wiring, in the interlayer insulating film, and burying Cu in the via holes and the wiring trench.
According to the damascene method, recesses, such as a wiring trench and via holes, are formed in an insulating film on a wafer, Cu is deposited thick on the entire surface of the wafer by electroplating or electroless plating, and the Cu is removed except that in the recesses by chemical-mechanical polishing (CMP) to form a wiring layer.
At present, a dual damascene method has become mainstream in terms of not only finer patterning of the wafer but its cost reduction. The dual damascene method comprises successively forming via holes and a wiring trench, which are used for connections to a lower wiring, in an interlayer insulating film, and forming a wiring to be connected to the lower wiring by Cu burying limited to one occasion and CMP.
As to plating utilized for the Cu burying, the thickness of the growing Cu varies greatly depending on the number of the via holes and the size of the wiring trench. As a result, the planarity of their surface may be significantly impaired after CMP.
In order to cope with the significant variation in the Cu growth rate caused by its burying pattern, plating solutions contain organic additives called a leveler and an accelerator in addition to copper sulfate. Also, the plating solutions contain another additive which retards the corrosion development of the plated portions in the atmosphere and during storage of wafers using storage cases. In addition, it is thinkable that the plating solutions contain an additive solution which controls their pH.
In general, the additives in the plating solutions have been regarded as a piece of know-how by plating solution makers. Therefore, semiconductor makers using those solutions have not been given the details of the plating solutions.
As to the leveler or the accelerator in the plated film, some are able to become encroached in the via holes and the trench, but some are not. It is said that the growth rate of the plated film varies by the presence or absence of those additives.
In addition, the following is also thinkable: an organic substance with a relatively high molecular weight which cannot become encroached in the trench as the leveller or the accelerator and an organic substance with a relatively low molecular weight which can uniformly exist everywhere including the trench are selected, and the balance of the two organic substances is adjusted. By doing this, the leveller or the accelerator controls the growth rate of the plated film during plating. As a result, the plated film is controlled so as to have no trench pattern dependency and to be able to be formed in a flatter state.
By adding these additives to the plating solution, the pH of the plating solution varies greatly, so that it is thinkable that the growth rate of the plated film varies greatly and that the additives are organic substances containing an amine group.
As an inhibitor used for Cu, BTA(benzotriazole) is most famous, and hence there may be cases where BTA is added in order to simply enhance the corrosion resistance of plated films. Besides, there are many cases where the corrosion prevention effect is imparted to chelating agents. Those chelating agents may contain an amine group, sulfur, and phosphorus.
A plated film formed by using a plating solution containing those additives is deposited in a state that it contains the various additives. Therefore, the plated film containing these additives is of high resistance, so that the decomposition and the release of the additives are conducted through heat treatment which is carried out at a subsequent manufacturing step. As a result, the additives are partly left in the Cu film as bubbles, which causes the degradation of electro-migration resistance and stress-migration resistance.
As a method of removing the bubbles which degrades the electro-migration resistance, a method of conducting heat treatment after CMP has been already proposed (see, for example, Japanese Patent Laid-Open No. 186261/1999).
In this heat treatment method, wafers are inserted into a heat treatment apparatus at a temperature of 300° C. or less after CMP, and then the temperature is raised to a prescribed heat treatment temperature of 300° C. to 500° C. at a rate of temperature rise of 20° C./min or less. Their heat treatment time at the highest temperature is from 5 seconds to 2000 seconds.
As described above, the removal of the impurities from the plated film through heat treatment after CMP simply makes the grain size of the Cu increase. Therefore, the electro-migration resistance is improved, but voids are exposed in the upper portion of the metallic material, which impairs its planarity.
Besides, in case where the wafer is heat treated at a temperature of 300° C. or more, hillocks are generated due to the existence of crystal grains which causes the abnormal growth of the Cu crystals. Therefore, in order to prevent the hillocks and the voids in the Cu film, heat treatment conditions before CMP are of consequence.
Further, in case where the technique proposed is applied to heat treatment before CMP, it is assumed that the wafer is inserted into the heat treatment apparatus at a temperature of about 150° C. Since the plating solution contains the organic additives, their carbonization proceeds before decomposition at a temperature in excess of 100° C. As a consequence, the grain growth of the Cu is promoted, but the voids tend to increase.
In addition, when the heat treatment temperature is in excess of 300° C., the hillocks on the surface of the Cu film increase markedly in size and have a height of 3 μm maximum. As a result, the asperities on the surface markedly increase in scale before CMP. After CMP, wave-shaped asperities on the wafer surface, such as dishing and erosion, and pattern density-dependent unevenness increase in scale.
Metal wiring used for a present-day fine patterning process has been mainly made of copper material so as to be of low resistance.
In case where copper material is used to form metal wiring, the following method is used: via holes and a wiring trench are formed in an interlayer insulating film, and then, subsequently, a Cu film is formed in such a manner that the Cu wiring material is buried in the via holes and the wiring trench by plating or the like. After that, the Cu film is planed off by CMP so as to become flush with the surface of interlayer insulating film.
The plated film contains the large amount of organic substances and ingredients of solutions (additives) added to the plating solution. Therefore, those additives are left in the wiring material, which causes a problem that wiring resistance becomes too high to achieve a prescribed resistance.
Besides, since the organic substances left in the wiring inhibit the grain growth of the wiring material, they cause the degradation of electro-migration resistance.
Furthermore, sulfate group, an amine group, and chlorine group added to the plating solution cause the following problem when left in the film: the sulfate group, amine group, and chlorine group may exist when the interlayer insulating film and the metal film are grown after plating and in a state that they are deposited at a set temperature during dry etching. In this case, the sulfate group, amine group, and chlorine group corrode the Cu during chemical liquid process and water washing process conducted to remove reaction products (polymers) generated when the wiring trench and the via holes have been formed.
Likewise, there is a high possibility that the organic substances added to the plating solution contain substances having Cu-dissolving ingredients, such as amine group. Therefore, an amine group or the like may also exist solely in these substances when the interlayer insulating film and the metal film are grown and when decomposed at a set temperature during dry etching. In this case, the Cu is corroded during chemical liquid process and water washing process in the process of removing polymers after the formation of the wiring trench and the via holes.
Also, there is caused a phenomenon in which the interface between the Cu film and the interlayer insulating film is abnormally etched after the polymer removal.
Further, it is expected that the organic substances existing in the Cu wiring material are decomposed by not only heat generated by operating the semiconductor device after its completion but heat emitted by driving systems, such as motors, around the semiconductor device. This generates voids in the wiring material and makes portions where the upper and lower layers are connected to each other at the contact regions and the like highly resistant. Therefore, the semiconductor device malfunctions due to wiring delay, and that there is a high possibility that its mounted portions corrode due to moisture permeating from the wiring.
Furthermore, in case where the Cu wiring layer is formed, it is necessary to prevent short circuits between the upper and lower wirings by preventing the abnormal growth of the metal grains, i.e., the hillocks.
As explained above, in the related art manufacturing method of semiconductor devices, metal wiring is formed by burying in the buried metal wiring process. At this time, organic substances and ionic impurities are included in a metal of which the wiring is made up. As a result, there have been cases where wiring resistance is increased, electro-migration resistance and stress-migration resistance are degraded due to the inhibition of its grain growth by heat treatment, the metal film is corroded, and abnormal etching occurs at the interface between the metallic material and the interlayer insulating film, which has frequently impaired the reliability of the metal film wiring.